verilog

verilog

 英

  • 网络硬件描述语言;设计语言;硬件设计语言

例句

The ISE user interface allows you to add entities either in a schematic view or as HDL objects (either Verilog or VHDL).

ISE用户界面允许示意图视图添加实体作为HDL对象VerilogVHDL添加

familiar with ic developing environments including logic synthesis, timing analysis and verilog simulation.

熟悉逻辑综合时序分析verilog仿真ic开发环境

In 1986, Verilog, a popular high-level design language, was first introduced as a hardware description language by Gateway.

1986年,Verilog流行高级别的设计语言首次引入硬件描述语言网关

Use verilog hdl to implement a flip-flop with synchronous RESET and SET, a Flip-flop with asynchronous RESET and SET.

实现同步复位触发器实现异步复位触发器

To analyse it, we built a matlab baseband model. In chapter 7, we give out the simulation result and FPGA test result.

文章同时软件仿真结果以及Verilog语言描述FPGA硬件测试结果

Use verilog hdl to implement a latch with asynchronous RESET and SET.

实现异步复位锁存

Skillfully use Verilog hardware description language for logic design and synthesize;

熟练使用Verilog硬件描述语言进行综合设计

The Design Example of Verilog HDL and Its Simulation & Synthesis

设计实例及其仿真综合

Verilog HDL and Its Application in The Digital System Modelling

及其数字系统应用

Two Special Data Types in Verilog HDL and Evaluation of the Variables

语言特殊数据类型及其

Analysis of several problems in digital circuit design by verilog HDL

设计数字电路过程两个问题

Parties disagree: that the Verilog defence, the development of a new design language is a waste;

各方人士各持己见Verilog辩护认为开发一种设计语言一种浪费

Experience in IC Design project with verilog is preferred;

一定IC设计经验项目参与经验优先

Designing of Traffic Lights with Left Turn Controllers Based on Verilog HDL

语言左转复杂交通设计

Design of Taxi Accounting System Based on Verilog HDL

出租车计费系统研制

Design of digital circuit based on Verilog HDL

数字电路设计